A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distribution obtained through approximating the input output function of the SI circuit by conventional wavelet collocation method.In practical applications,the proposed method is a general purpose approach,by which both the small signal effect and the large signal effect are modeled in a unified formulation to ease the process of modeling and simulation.Compared with the published modeling approaches,the proposed nonlinear auto companding method works more efficiently not only in controlling the error distribution but also in reducing the modeling errors.To demonstrate the promising features of the proposed method,several SI circuits are employed as examples to be modeled and simulated.
RLC model is used to estimate the coupling noise between interconnect wires and make some analysis through the simulation result. Based on the analysis conclusion,some algorithms are developed to adjust the rou ting result with crosstalk constraint.
The performances of analog circuits depend greatly on the layout parasitics and mismatches.Novel techniques are proposed for modeling the distributed parasitic capacitance,parasitic parameter mismatch due to process gradient and the inner stack routing mismatch.Based on the proposed models,an optimal stack generation technique is developed to control the parasitics and mismatches,optimize the stack shape and ensure the generation of an Eulerian graph for a given CMOS analog module.An OPA circuit example is given to demonstrate that the circuit performances such as unit gain bandwidth and phase margin are enhanced by the proposed layout optimization method.
In order to estimate circuit power at the early design stage,a rapid analysis method is presented to calculate the RTL power of combinational modules.By building the power library with Monte Carlo simulation,the power dissipation of a certain module of any input vector can be obtained.This method uses Taylor's expansion to establish an equation based model.The simulation results for ISCAS85 circuit show that the method has error within 5%.
