Redundant via （RV） insertion is a useful mechanism to enhance via reliability. However, when extra vias are inserted into the design, the circuit timing might be changed. Therefore, how to insert RV under the timing constraints is the main challenge. In this paper, we introduce a new model to compute the distance between a RV and the corresponding single via, put forward a new RV type, which is called the long length via （LLV）, and then present an improved RV insertion method considering the timing constraints. This computing model can certify that the timing, which is obtained aider inserting a RV, is not greater than the original timing. Meanwhile, the new RV type LLV can increase the possibility of RV insertion; this method provides a global perspective for the RV insertion. Considering the timing constraints, the total redundant via insertion rate is 85.38% in the MIS-based method, while our proposed method can obtain a high insertion rate 88.79% for the tested circuits.
As the technology scales advancing into the nanometer region,the concept of yield has become an increasingly important design metric.To reduce the yield loss caused by local defects,layout optimization can play a critical role.In this paper,we propose a new open sensitivity-based model with consideration of the blank space around the net,and study the corresponding net optimization.The proposed new model not only has a high practicability in the selection of nets to be optimized but also solves the issue of the increase in short critical area brought during the open optimization,which means to reduce the open critical area with no new short critical area produced,and thereby this model can ensure the decrease of total critical area and finally achieves an integrative optimization.Compared with the models available,the experimental results show that our sensitivity model not only consumes less time with concise algorithm but also can deal with irregular layout,which is out of the scope of other models.At the end of this paper,the effectiveness of the new model is verified by the experiment on the randomly selected five metal layers from the synthesized OpenSparc circuit layout.
